CM2030/CM2031 KEY FEATURE SUMMARY

ROBUST PORT PROTECTION

• 8kV contact ESD protection on all 12 lines, per IEC61000-4-2, level 4
• Ultra low capacitance 0.9pF diodes minimize signal attenuation
• Electrical isolation/backdrive protection on all lines
• 170mA overcurrent protection on 5V supply (CM2030).

• Optimized layout improves differential impedance matching
• High speed data transmission passes HDMI compliance tests at speeds greater than HDMI 1.3, including time domain reflectometry (TDR) impedance tests at < 35ps resolution
• Eye diagrams pass compliance for HDMI 1.3 data rates.

• Supports thin dielectric layouts
• Eliminates the need for common mode filters (chokes) for impedance matching
• Supports low cost 2 layer boards
• Layout matched to HDMI connector for ease of routing, minimal space
• Low capacitance voltage level shifters on DDC, CEC and Hot Plug signals
• Dynamic pullups on DDC lines enable longer and cheaper cables
• Active CEC termination with slew rate limiting reduces ringing and overshoot
• Integrated Hot Plug logic for passive or active control
• DDC circuitry eliminates the need for external I2C muxes in multiport HDMI devices.

Figure 1. CM2030 Device Schematic

CHALLENGES FOR HDMI PORT ESD PROTECTION

HDMI ports are susceptible to ESD damage. New generations of HDMI transceiver silicon are moving to smaller geometry manufacturing processes, making them even more susceptible to damage. At the same time, HDMI systems are becoming more prone to ESD events as customers hot plug digital camcorders and video game systems into digital televisions, and ports are mounted on the front side of TVs and DVD recorders. An ESD pulse can enter the system either though a direct strike at the HDMI port, through a cable, or through a DVI to HDMI adapter. These strikes can result in permanent damage to the system and expensive returns.
Because an ESD strike can enter on any of the exposed pins, an ESD protection device should be used on all 12 ESD signal lines (8 TMDS signals, 2 DDC, CEC and Hot Plug).

Figure 2. Typical ESD damage scenario

• IEC61000-4-2 contact rating: should be 8kV or greater
• Response time: should be < 1ns
• Low clamping and trigger voltage: <10V.

• Very low junction (I/O to Ground) capacitance to minimize signal distortion
• Tightly matched capacitance to minimize signal skew
• Low capacitance between I/O lines to minimize crosstalk
• Low signal attenuation at fundamental and harmonic frequencies
• Clean layout, with equal trace lengths and minimal turns, for minimum skew and fewer reflections.

Figure 3. CM2031 Flow through Design Minimizes Layout Related Parasitics

Figure 4. TDR measurements on HDMI 1.3 partner evaluation board at 200ps and 35ps

Figure 5 shows an eye diagram measured on the CM2030 evaluation board, with a pixel clock rate of 225 MHz (faster than the 165 MHz maximum pixel clock rate allowed in the HDMI 1.2 specification). Again, even at these much higher frequencies, this board easily passes an HDMI eye diagram.

Figure 5. HDMI 1.3 Eye diagram illustrates preserved differential signal quality

CHALLENGE: SUPPORTING LONGER CABLES
HDMI system vendors face the challenge of interoperating with other HDMI devices, often over a cable supplied by a third party. The quality of this cable can be further compromised by end users who will connect HDMI cables to DVI adapter cables, which may exceed the capacitance limits of the HDMI specification.
As the length of cables increases (or if lower cost cables are used), the capacitance of the cable typically increases. This increased capacitance, particularly on the DDC lines, can prevent the devices from properly synchronizing, resulting in the inability to display a picture when using the HDMI port.
Figure 6a shows the effect on a DDC signal when a high capacitance (1.5 nF) cable is used with a discrete DDC implementation. While this cable exceeds the 700 pF limit for an HDMI cable as defined by the HDMI specification, it is similar to what a consumer might see when connecting an HDMI cable to a DVI cable. HDMI cables that do not conform to the specification are available with capacitance as high as 4.2 nF! As can be seen, the signal with the discrete implementation has a rise time that exceeds the I2C rise time limit of 1.0 uS.
To prevent this, system vendors can either ship expensive cables with every HDMI device, or they can put the burden on the end user and blame them for interoperability problems. Both of these choices hurt the manufacturer and the end consumer.

Figure 6a. Failing DDC signal on 1.5nF cable (discrete solution)	Figure 6b. Valid DDC signal on 1.5nF cable (CM2030 solution)

The CM2030 and CM2031 solves this by integrating active pullup circuitry on the DDC lines. The effect of this circuit is immediately obvious. As shown in Figure 6b, using the CM2030, the signal is much cleaner and has a legal rise time of approximately 0.5 uS, well in compliance with the HDMI specification. This eliminates the need for an OEM to ship expensive cables with their device, while also providing the end user experience that protects their brand name and reduces product returns.

THE CONSUMER ELECTRONICS CONTROL (CEC) INTERFACE
The CEC signal allows up to ten CEC devices to reside on the bus, and they may be daisy chained out through other physical connectors including other HDMI ports or dedicated CEC links. To limit the possible electromagnetic interference (EMI) and ringing, it is necessary to control the rise and fall time of this line. However, limiting the slew rate in this bidirectional block and providing proper line termination is difficult with discrete components.
The CM2030 and CM2031 integrate active termination circuitry and bidirectional slew rate limiting into the CEC level shifter functionality, allowing the system designer to directly interface a simple low voltage CMOS GPIO directly to the CEC bus and simultaneously guarantee meeting all CEC output logic levels and isolation specifications. The CM2030 also includes an internal backdrive protected static pullup 120µA current source for complete compliance with the HDMI 1.3 CEC specification.

Figure 7. Discrete Implementation vs CM2030/CM2031 Active Termination

Figure 7 illustrates the active termination circuitry of the CM2030 and CM2031. The left side of the figure illustrates a discrete CEC implementation, which exhibits both overshoot and undershoot on the CEC bus. The figure on the right shows the same circuit with the addition of the MediaGuard active termination circuitry. As can be seen, both the overshoot and undershoot are eliminated, resulting in a clean CEC signal.

INTEGRATED BACKDRIVE PROTECTION
Backdrive current is a potentially common occurrence in multimedia entertainment systems with multiple components. For example, if a DVD player is switched off and an HDMI connected TV is powered on, there is a possibility of reverse current flow back into the main power supply rail of the DVD player. Backdrive current can result in improper functioning of the device, such as the DVD player not starting up properly, or in more severe cases can cause permanent damage.
To avoid these situations, the CM2030 and CM2031 were designed to block backdrive current, guaranteeing less than 5µA into any I/O pin when the I/O pin voltage exceeds the CM2030 supply voltage.

Figure 8. Backdrive protection protects costly ASIC components

SUMMARY
Adopted by leading OEMs as well as included in reference designs by most major HDMI transceiver manufacturers, our HDMI protection devices are now deployed in millions of systems throughout the world. The CM2030 and CM2031 build on the success of our previous two generations of HDMI port protection solutions, providing an optimized and proven solution for supporting the latest HDMI features.